The strong growth in demand for portable consumer electronics is driving the need for high-capacity storage devices. Non-volatile semiconductor memory devices, such as flash memory storage cards, are becoming widely used to meet the ever-growing demands on digital information storage and exchange. Their portability, versatility and rugged design, along with their high reliability and large capacity, have made such memory devices ideal for use in a wide variety of electronic devices, including for example digital cameras, digital music players, video game consoles, PDAs and cellular telephones.
While many varied packaging configurations are known, flash memory storage cards may in general be fabricated as system-in-a-package (SiP) or multichip modules (MCM), where a plurality of die are mounted and interconnected on a small footprint substrate. The substrate may in general include a rigid, dielectric base having a conductive layer etched on one or both sides. Electrical connections are formed between the die and the conductive layer(s), and the conductive layer(s) provide an electric lead structure for connection of the die to a host device. Once electrical connections between the die and substrate are made, the assembly is then typically encased in a mold compound which provides a protective package.
One type of semiconductor package is a so-called fan out chip-scale package, where a semiconductor die is embedded in a mold compound with an active surface of the semiconductor die including the die bond pads being coplanar with a surface of the mold compound. A first surface of a redistribution layer is then affixed to the active surface of the semiconductor die and mold compound. The redistribution layer includes a second surface having solder balls for mounting the fan out package to a host device.
A cross-sectional side view a conventional fan out chip-scale semiconductor package 20 is shown in FIG. 1. Package 20 includes a semiconductor die, such as flash memory die 22. The semiconductor die 22 may be encased in a mold compound 24, with a surface 26 of the die 22 including die bond pads 28 being coplanar with a surface of the mold compound 24. A redistribution layer 30 may then be affixed to the coplanar surface of the die 22 and mold compound 24. The redistribution layer 30 electrically connects the die bond pads 28 of die 22 to solder bumps 32 via electrical traces 34 and vias 36 within the redistribution layer 30. The solder bumps 32 may be surface mounted to a host device such as a printed circuit board to electrically connect the package 20 the host device.
In fan out chip-scale packages such as package 20, there is room for a single semiconductor die, i.e., the semiconductor die 22 which lies directly against the redistribution layer 30. As the die bond pads 28 of die 22 lie directly against the electrical contacts in the adjacent surface of the redistribution layer 30, there is no room for electrical connection of additional die to the redistribution layer 30.